CONNECTIONS ON THE F1 BOARD

This information assumes a view of the F1 board from above, with the F1
chip on the left and the EPROM/RAM chips on the right.

Port D lines 2,3,4,5 (SPI)

  Looking down on the F1 PCB, you will see the three sets of 4 pins for
  RJ-11 4-wire (telephone style) sockets marked as J1.  The two sets of 4
  pins on the left each contain the SPI signals MISO (pd2), MOSI (pd3), SCK
  (pd4), and SSx (pd5).  If 4 pins are soldered and bent into alignment for
  a SIL header, we usually access these signals in the order pd4, pd3, pd2,
  and pd5 (left to right).

Port G lines 3,2,1,0

  Looking down on the F1 board, you will see 4 pins in a header marked K6
  (located between the F1 and J1).

Port A lines 0-7 and Vcc,GND

  The K1 connector is located near the top left corner of the board.

Port E lines 0-7

  The K2 connector is located near the top left corner of the board.  It
  provides the port E signals, and also convenient access to VRH and VRL.

---------------------------------------------------------------------------
TOP LEFT                                                          TOP RIGHT

          K1 Port A
K2      0 oo 1
Port E  2 oo 3
..o0    4 oo 5
..o1    6 oo 7
..o2  Vcc oo GND
..o3
..o4        -----------------------------
..o5       |                             |
..o6       |                             |
..o7       |          1                  |
 ..        |          1                  |
 ..        |          C                  |
           o pin 1    H                  |
           |          8                  |
           |          6                  |    
           |          C                  |    
           |          M                  |
    o      |                             |
 CRYSTAL   |                             |
    o       -----------------------------
                                K6
                                  o o o o Port G
                                  3 2 1 0
     
                         ___________________________________
                        |                                J1 |
7805 Regulator          |   Port D                          |
                        |   pd4  pd3  pd4  pd3              |
o +5V out               |     o  o      o  o      o  o      |    to the
o GND                   |      o  o      o  o      o  o     |    MAX232 ->
o DC in                 |    pd2  pd5  pd2  pd5             |  on right
                        |___________________________________|
     
BOTTOM LEFT                                                    BOTTOM RIGHT
---------------------------------------------------------------------------
phillip@mirriwinni.cse.rmit.edu.au July 1999